FabTime Wafer Fab Cycle Time Tutorial

FabTime Wafer Fab Cycle Time Tutorial

Cycle time in a factory is directly related to the amount of product in the factory (WIP), the

number of hours of production time available on each machine (capacity), and the amount of

variability in the factory. These relationships can be proven mathematically, and generally agree

with the intuition of factory managers. Understanding how the relationships work is the first step

to reducing cycle times.

Definitions

Cycle Time and WIP

Cycle Time and Capacity

Cycle Time and Variability

Cycle Time and Batching

P-K Formula

Cycle Time Tutorial Definitions

Bottleneck

The

machine

group

in

a

factory

that

has

the

highest

loading

for

a

given

product

mix.

Some

authors

define bottleneck as having a loading of 100%. However, in common use, bottleneck usually refers to

the most highly loaded machine group.

Capacity

The maximum throughput of a factory or workstation. For a factory, the capacity is the throughput rate

that drives the idle time on the bottleneck to zero.

Cycle Time

The total time required to produce a product, from entering the factory to leaving the factory. Cycle time

includes time actually spent processing, as well as transport time and time spent waiting in queue. Cycle

times by operation are also sometimes reported, and include the time from arrival at the operation until

completion of processing.

Cycle-Time-Constrained Capacity

The throughput rate for a factory at which the average cycle time is equal to some target amount, usually

expressed as a multiple of the total weighted average raw process time of the factory. For example, the

3X cycle-time- constrained capacity is the throughput rate at which the weighted average cycle time for

the factory is no more than three times the weighted average raw processing time.

Little’s Law

A

fundamental

relationship

derived

by

J.

D.

C.

Little

concerning

cycle

time,

work-in-process

and

throughput.

Little’s

Law

states

that

at

a

given

WIP

level,

the

ratio

of

WIP

to

cycle

time

equals

throughput. An illustration is available as part of this tutorial.

Throughput

The average output rate of a factory or workstation. The throughput of a factory is equal to the factory

start rate multiplied by average line yield.

Work- in-Process (WIP)

The average number of units of product in the factory (or at a workstation). WIP includes units being

processed on equipment, as well as units in transit, or awaiting processing at an equipment group.

The Relationship Between Cycle Time and WIP

The relationship between cycle time and WIP was first documented in 1961 by J. D. C. Little.

Little’s Law

states that at a given WIP level, the ratio of WIP to cycle time equals throughput, as

shown in the formula below:

In other words, for a factory with constant throughput, WIP and cycle time are proportional. If

throughput is held constant, it is impossible to reduce average WIP without reducing average cycle

time, and vice versa. It is important to understand that this is a known mathematical relationship.

Over the long term, it will hold true for an entire factory, or for a single workstation (as long as the

units used for each term are consistent with one another).

Little’s Law

can be illustrated with a simple example: assume a factory with a capacity of 500

wafers per week and no variability. Although this is a highly unrealistic assumption, we will relax

it later in the tutorial. Under these assumptions, if we start 500 wafers or less in each week, the

cycle time for each will be one week (because we have enough capacity to process them all during

the week).

However, suppose that we start out with a backlog of 500 wafers in the fab. Each week we get 500

more in, so that the total WIP is 1000. We can only process 500 of the wafers in a given week. On

average, each wafer will spend two weeks in the factory (one week waiting for the backlog of

other wafers to be processed, the next week being processed). Similarly, if we have 1500 wafers in

the factory at a time, the average cycle time will be three weeks, etc. This is shown in the graph

below.

As another way of looking at this, the following graph shows average throughput vs. average WIP.

Up to the capacity of the factory, the throughput (the amount we get out per week) will equal the

amount that we start per week. However, when the WIP in the factory reaches the capacity of 500

wafers per week, throughput can no longer increase. No matter how much WIP we cram into this

factory, we will never get more than 500 wafers per week out (without increasing the fab capacity

in some way). And, as shown in the first chart, the more WIP we cram in, the longer the average

cycle time will be.

In this example, the best thing to do is clear - start exactly 500 wafers each week. This will

maximize throughput, while cycle time remains at the minimum of one week. However, the

situation is only this black and white for systems with no variability. For fabs that operate in the

real world, we have to consider the relationship between cycle time and variability.

The Relationship Between Cycle Time and Variability

Cycle time increases with variability. For example, suppose that you have a single machine that

can process four lots per hour (one at a time). If each lot takes exactly 15 minutes to process, and

lots arrive exactly every 15 minutes, then the lots will experience no queue delay. The cycle time

through this step for each lot will be 15 minutes of pure process time, and the machine will operate

with 100% utilization. However, in a real fab, neither the interarrival times nor the processing

times will be exactly the same from lot to lot.

Variability in Processing Times

All sorts of things contribute to variability in processing time in a fab. Different recipes are

processed on the same machine, and have different process times. Setups increase process time

(from the lot’s perspective), as do equipment failures. When rework lots come through, they

typically have fewer wafers than regular lots, and so have lower processing times. Similarly, yield

loss reduces the number of wafers per lot, and can reduce process time per lot. Operators don’t

always remove lots from the machine immediately upon completion, increasing the effective

process time.

Suppose that in the example above the processing time averages 15 minutes, but can range from 10

minutes to 20 minutes for each individual lot. Also suppose that the first lot takes 20 minutes.

When the second lot arrives 15 minutes after the first, it will have to wait for five minutes. This

means that the average queue time of the first two lots has increased from zero to 2.5 minutes. And

things will just keep getting worse over time. Once you have any lots that wait, you can never

again have zero wait time, because the best case for a lot is that its waiting time is zero. You never

have any negatives to cancel out the positive delay.

Now suppose that the first lot only took 10 minutes to process. This means that the machine will be

idle for five minutes, until the second lot arrives. This is a problem, because this machine is

supposed to be operating at 100% utilization. Those five minutes of idle time can never be

recovered. For a good illustration of this, we recommend that you read

The Goal

by Eli Goldratt

and Jeff Cox.

Variability in Arrival Times

Even more of a problem in wafer fabs than variability in process times is variability in time

between arrivals. The primary culprit here is batch processing. Suppose that in our example, the

step before the example machine takes place on a batch tool with a batch size of four lots, and a

processing time of one hour per batch. Instead of arriving at our machine once every 15 minutes,

lots arrive instead in a batch of four every hour. Since the example machine can only process one

lot at a time, the other three lots will have to wait while the first lot is processed. Then lots three

and four will wait while the second is processed, and so on. The average queue delay for this batch

(assuming that the machine is idle when it arrives) is [0 + 15 + 2*(15) + 3(15)]/4 = 22.5 minutes.

Other factors also contribute to variability in lot arrival times, including rework, transfer batching,

and operator delays. The net result is that when a system has variability, the cycle time increases.

How much the cycle time increases depends in part on the utilization of the system. In the example

below, we have a single machine, loaded to 60%, 75%, and 90% utilization. The process time is

constant, but the interarrival times vary. As the chart shows, the more variability there is in the

arrival process (as shown on the X-axis), the higher the cycle times will be (as shown on the

Y-axis). The higher the overall utilization of the system, the worse the effect is.

The above chart was generated using a simple queueing formula for the queue delay for a single

machine. Simulation can also be used to do what-if analysis of the impact of variability on cycle

time. The bottom line is that any system system with variability will experience some queueing -

the higher the utilization of the system, the worse the effect. See the discussion on cycle time and

capacity for more details.

The Relationship Between Cycle Time and Capacity

In the (imaginary) no-variability case, cycle time remains constant as start rate is increased, up to

the maximum system capacity. At that point, if start rate is increased further, cycle time increases

linearly. This is shown in the following chart.

In a real fab, with variability, cycle time tends to increase with start rate (or throughput rate - the

two measures are directly related by line yield). Exactly how much the cycle time increases will

depend on the amount of variability in the system. In most fabs, once the system is loaded above

approximately 85%, cycle time starts to increase rapidly. This is sometimes called the “hockey

stick effec

t,” as illustrated below.

Cycle time limits the effective capacity of a wafer fab. Even the low variability system cannot be

run at 100% of the maximum throughput, because cycle time increases rapidly to unacceptable

levels. In fact, the limiting case for systems with any variability is that as the factory loading

approaches 100%, the cycle time approaches infinity. In the real world, factory planners account

for this by i

ncluding “catch

-

up capacity” in their plans. That is, they typically plan for about 15%