adverb常见英文缩写解释

常见英文缩写解释（按字母顺序排列）

：

ASIC: Application Specific Integrated Circuit.

专用

IC

CPLD: Complex Programmable Logic Device.

复杂可编程逻辑器件

EDA: Electronic Design Automation.

电子设计自动化

FPGA: Field Programmable Gate Array.

现场可编程

门阵列

GAL: Generic Array Logic.

通用阵列逻辑

HDL: Hardware Description Language.

硬件描述语言

IP: Intelligent Property.

智能模块

PAL: Programmable Array Logic.

可编程阵列逻辑

RTL: Register Transfer Level.

寄存器传输级描述

SOC: System On a Chip.

片上系统

SLIC: System Level IC.

系统级

IC

VHDL: Very high speed integrated circuit Hardware Description Language.

超高速集成电路硬件描述语言

A

ASIC

（专用集成电路）

Application-Specific

Integrated

Circuit.

A

piece

of

custom-designed

hardware in a chip.

专用集成电路。一个在一个芯片上定制设计的硬件。

address bus

（地址总线）

A set of electrical lines connected to the processor and all of the

peripherals withwhich itcommunicates. The address bus is used by the

processor

to

select

aspecific

memory

location

or

register

within

a

particular peripheral. If the address bus contains n electrical lines,

the processor can uniquely address up to 2^n such locations.

一个连接处理器与所有外设的，

用来通讯的电子线路集。

地址总线被处理器

用来选择在特定外设中的存储器地址或寄存器。如果地址总 线有

n

条电子线路，

处理器能唯一寻址 高达

2^n

的地址空间。

application software

（应用软件）

Describes

software

modules

specific

to

a

particular

embedded

project.

The application software is unlikely to be reusable across embedded

platforms,

simply

because

each

embedded

system

has

a

different

application.

用来描述一个特定的嵌入式项目中的某一软件模块。

应用软件不象可重用的

交叉嵌入式平台，只是因为每一个嵌入式系统有不 同的应用软件。

assembler

（汇编编译器）

A

software

development

tool

that

translates

human-readable

assembly

language

programs

into

machine-language instructions

that

the

processor

can understandand execute.

软 件开发工具。

assembly language

（汇编语言）

A

human-readable

form

of

a

processor's

instruction

set.

Most

processor-specific functions must be written in assembly language.

一种人 可读的处理器指令集的形式。

大多数处理器相关的功能必须用汇编语

言编写。

B

BSP

（板卡支持包）

See board support package.

见

board support package

。

binary semaphore(

二元信号

)

A type of semaphore with just two states. Also called a mutex.

一种只有两种状态的信号。也叫互斥信号。

board support package

（板卡支持包）

Part of a software package that is processor or platform- dependent.

Typically, sample source code for the board support package is provided

by

the

package

developer.

The

sample

code

must

be

modified

as

necessary,

compiled, and linked with the remainder of the software package.

软件包 的具有平台依赖性的那一部分。

典型地，

板卡支持包的样例源程 序由

包开发者提供。

样例源程序必须能在需要时被修改、

编译并与软件包的剩下的部

分连接起来。

bond-out processor

（外合处理器）

A

special

version

of

a

processor

that

has

some

of

the

internal

signals

brought out to external pins. A bond-out processor is most often found

within

an

emulator

and

is

never

intended

to

be

used

in

a

production

system.

一种特殊版本的处理器，

它有一些，

内部的信号能传达到外置的针脚上。

一

个外合处理器绝大多数情况下只用在模拟器上，从来不会被特意用在产品系统

上。

Breakpoint

（断点）

A

location

in

a

program

at

which

execution

is

to

be

stopped

and

control

of the processor switched to the debugger. Mechanisms for creating and

removing breakpoints are provided by most debugging tools.

一个在程序中的地址，

在那里程序的 执行被停止，

并且处理器的控制转换到

了除错程序。大多数除错 工具提供增加与删除一个断点的机制。

C

CISC

（复杂指令集计算机）

Complex Instruction Set Computer. Describes the architecture of a

processor

family.

CISC

processors

generally

feature

variable-length

instructions,

multiple

addressing

formats,

and

contain

only

a

small

number

of

general-purpose

registers.

Intel's

80x86

family

is

the

quintessential example of CISC. Contrast with RISC.

复杂指令集计算机。对一种处理器 架构的描述。

CISC

处理器一般产生变长

的指令，多种地址格式，并且仅仅有少量的通用寄存器。

Intel

的

80x86

家族是

是典型的

CISC

处理器。相对于

RISC

而言。

CPU

（中央处理器）

Central

Processing

Unit.

The

part

of

a

processor

that

executes

instructions.

中央处理器。处理器中执行指令的那一部分。

Compiler

（编译器）

A software development tool that translates high- level language

programs

into

the

machine-language

instructions

that

a

particular

processor can understand and execute.

把高级 编程语言程序转换到只有特定的处理器能了解和执行的机器指令的

一种软件开发包。

context

（上下文）

The current state of the processor's registers and flags.

处理器当前的状态和标志。

context switch

（上下文切换）

The process of switching from one task to another in a multitasking

operating system. A context switch involves saving the context of the

running

ask

and

restoring

the

previously-saved

context

of

the

other.

The

piece of code that does this is necessarily processor-specific.

在多任 务操作系统中我一个任务切换到另一个的过程。

上下文切换包括保存

正在运行的任务的上下文和恢复早先保存的另一个任务的上下文。

做这个工作的

一段代码必须具有处理器特权。

counting semaphore

（计数信号）

A type of semaphore that is used to track multiple resources of the

same

type.

An

attempt

to

take

a

counting

semaphore

is

blocked

only

if

all

of the available resources are in use. Contrast with binary semaphore.

一种用来跟踪多个相同类型资源的信号灯。

仅仅在所有可用的资源都被 用完

了时才阻塞。相对二元信号而言。

critical section

（临界段）

A

block

of

code

that

must

be

executed

in

sequence

and

without

interruption

to

guarantee

correct

operation

of

the

software.

See

also

race

condition.

一段必须按次序执行的代码，

并且不 能被中断，

否则不能保证软件正确地操

作。参照：竞争状况。< /p>

cross- compiler

（交叉编译器）

A

compiler

that runs

on

a different

platform than the

one for which

it produces object code. A cross- compiler runs on a host computer and

produces object code for the target.

一个运 行在不同的平台上的编译器，

其中之一能产生目标代码。

交叉编 译器

在主机上运行并且产生目标机的目标代码。

D

DMA

（直接内存访问）

Direct Memory Access. A technique for transferring data directly

between two peripherals (usually memory and an I/O device) with only

minimal intervention by the processor. DMA transfers are managed by a

third peripheral called a DMA controller.

直接内存访问。

一种直接在两个外设

（通常 是内存和

I/O

设备）

之间进行数

据传输的技术，它只要处理器最少的介入。

DMA

< br>传输由叫

DMA

控制器的第三方外

设进行管理。

DRAM

（动态随机访问存储器）

Dynamic

Random-Access

Memory.

A

type

of

RAM

that

maintains

its

contents only as long as the data stored in the device is refreshed at

regular

intervals.

The

refresh

cycles

are

usually

performed

by

a

peripheral called a DRAM controller.

动态随机访问存储器。一种

RAM< /p>

，存储在其设备中的数据被定期刷新时才能

保存它的内容。刷新周 期一般由一个叫

DRAM

控制器的外设完成。

< br>

Data bus

（数据总线）

A set of electrical lines connected to the processor and all of the

peripherals

with

which

it

communicates.

When

the

processor

wants

to

read

(write)

the

contents

of

a

memory

location

or

register

within

a

particular

peripheral, it sets the address bus pins appropriately and receives

(transmits) the contents on the data bus.

连接处理器与所有外设进行通讯的电子线路集。当一个处理器想去写（读）

某一特定外设中的存储器地址或寄存器中的内容时，

处理器设置地址总线并在 数

据总线上接收（传输）内容。

Deadline

（死线）

The

time

at

which

a

particular

set

of

computations

must

be

completed.

See also real- time system.

一个特定计算必须被完成的时间。请看实时系统。

Deadlock

（死锁）

An unwanted software situation in which an entire set of tasks is

blocked, waiting for an event that only a task within the same set can

cause. If a deadlock occurs,

the

only solution

is to reset

the hardware.

However,

it

is

usually

possible

to

prevent

deadlocks

altogether

by

following certain software design practices.

一种不希望出现的软件状态，

在这个 状态下，

所有的任务因为等待一个只有

在这些被阻塞任务之一才 能产生的事件而被阻塞。

如果死锁发生，

唯一解决的方