操作系统习题(英文版)

2021年1月25日发(作者：发动)
Chapter 1
–
Computer Systems Overview

True / False Questions:


1.

T / F
–
The operating system acts as an interface between the computer
hardware and the human user.



2.

T / F
–

One of the processor’s main functions is to exchange data with
memory.



3.

T / F
–
User-visible registers are typically accessible to system programs but
are not typically available to application programs.



4.

T / F
–
Data registers are general purpose in nature, but may be restricted to
specific tasks such as performing floating-point operations.



5.

T / F
–
The Program Status Word contains status information in the form of
condition codes, which are bits typically set by the programmer as a result of
program operation.



6.

T / F
–
The processing required for a single instruction on a typical computer
system is called the Execute Cycle.



7.

T / F
–
A fetched instruction is normally loaded into the Instruction Register
(IR).



8.

T / F
–
An interrupt is a mechanism used by system modules to signal the
processor that normal processing should be temporarily suspended.



9.

T / F
–
To accommodate interrupts, an extra fetch cycle is added to the
instruction cycle.



10.


T / F
–
The minimum information that must be saved before the processor
transfers control to the interrupt handler routine is the program status word
(PSW) and the location of the current instruction.



11.


T / F
–
One approach to dealing with multiple interrupts is to disable all
interrupts while an interrupt is being processed.



12.


T / F
–
Multiprogramming allows the processor to make use of idle time
caused by long-wait interrupt handling.



13.

T / F
–
In a two-level memory hierarchy, the Hit Ratio is defined as the
fraction of all memory accesses found in the slower memory.




14.


T / F
–
Cache memory exploits the principle of locality by providing a small,
fast memory between the processor and main memory.



15.


T / F
–
In cache memory design, block size refers to the unit of data
exchanged between cache and main memory



16.


T / F
–
The primary problem with programmed I/O is that the processor
must wait for the I/O module to become ready and must repeatedly
interrogate the status of the I/O module while waiting.




Multiple Choice Questions:


1.

The general role of an operating system is to:


a.

Act as an interface between various computers

b.

Provide a set of services to system users

c.

Manage files for application programs

d.

None of the above



2.

The four main structural elements of a computer system are:


a.

Processor, Registers, I/O Modules & Main Memory

b.

Processor, Registers, Main Memory & System Bus

c.

Processor, Main Memory, I/O Modules & System Bus

d.

None of the above



3.

The two basic types of processor registers are:

a.

User- visible and Control/Status registers

b.

Control and Status registers

c.

User-visible and user-invisible registers

d.

None of the above



4.

Address registers may contain:


a.

b.

c.

d.



5.

A Control/Status register that contains the address of the next instruction to
be fetched is called the:


a.

b.

c.

d.


6.

The two basic steps used by the processor in instruction processing are:


a.

b.

c.

d.



7.

A fetched instruction is normally loaded into the:


a.

b.

c.

d.



8.

A common class of interrupts is:


a.

Program

Instruction Register (IR)

Program Counter (PC)

Accumulator (AC)

None of the above

Fetch and Instruction cycles

Instruction and Execute cycles

Fetch and Execute cycles

None of the above

Instruction Register (IR)

Program Counter (PC)

Program Status Word (PSW)

All of the above

Memory addresses of data

Memory addresses of instructions

Partial memory addresses

All of the above

b.

Timer

c.

I/O

d.

All of the above



9.

When an external device becomes ready to be serviced by the processor, the
device sends this type of signal to the processor:


a.

b.

c.

d.



10.


Information that must be saved prior to the processor transferring control
to the interrupt handler routine includes:


a.

b.

c.

d.


11.

One accepted method of dealing with multiple interrupts is to:


a.

b.

c.

d.



12.


In a uniprocessor system, multiprogramming increases processor efficiency
by:


a.

Increasing processor speed

b.

Taking advantage of time wasted by long wait interrupt handling

c.

Eliminating all idle processor cycles

d.

All of the above



13.


As one proceeds down the memory hierarchy (i.e., from inboard memory to
offline storage), the following condition(s) apply:


a.

Increasing cost per bit

b.

Decreasing capacity

Define priorities for the interrupts

Disable all interrupts except those of highest priority

Service them in round-robin fashion

None of the above

Processor Status Word (PSW)

Processor Status Word (PSW) & Location of next instruction

Processor Status Word (PSW) & Contents of processor registers

None of the above

Interrupt signal

Halt signal

Handler signal

None of the above

c.

Increasing access time

d.

All of the above



14.


Small, fast memory located between the processor and main memory is
called:


a.

b.

c.

d.



15.

When a new block of data is written into cache memory, the following
determines which cache location the block will occupy:


a.

Block size

b.

Cache size

c.

Write policy

d.

None of the above



16.


Direct Memory Access (DMA) operations require the following information
from the processor:


a.

b.

c.

d.

Address of I/O device

Starting memory location to read from or write to

Number of words to be read or written

All of the above

WORM memory

Cache memory

CD-RW memory


None of the above


Questions

1.1
，
1.4
，
1.7
，
1.8

Problems

1.1
，
1.3
，
1.4，
1.5
，
1.7