independent是什么意思中英文文献翻译—DS18B20的研究与应用

2021年1月19日发(作者：疯了)

附录


Research and Application of DS18B20

Communication
to
the
DS18B20
is
via
a
1-Wire
port.
With
the
1-Wire
port,
the
memory and control functions will not be available before the ROM function protocol has
been established. The master must first
provide one
of five ROM function commands: 1)
Read
ROM,
2)
Match
ROM,
3)
Search
ROM,
4)
Skip
ROM,
or
5)
Alarm
Search.
These
commands operate on the 64-bit lasered ROM portion of each device and can single out a
specific device if many are present on the 1-Wire line as well as indicate to the bus master
how many and what types of devices are present. After a ROM function sequence has been
successfully executed, the memory and control functions are accessible and the master may
then provide any one of the six memory and control function commands.
One
control
function
command
instructs
the
DS18B20
to
perform
a
temperature
measurement. The result of this measurement will be placed in the DS18B20’s scratch
-pad
memory, and may be read by issuing a memory function command which reads the contents
of
the
scratchpad
memory.
The
temperature
alarm
triggers
TH
and
TL
consist
of
1
byte
EEPROM each. If the alarm search command is not applied to the DS18B20, these registers
may be used as general purpose user memory. The scratchpad also contains a configuration
byte to set the desired resolution of the temperature to digital conversion. Writing TH, TL,
and the configuration byte is done using a memory function command. Read access to these
registers is through the scratchpad. All data is read and written least significant bit first.
In
order
for
the
DS18B20
to
be
able
to
perform
accurate
temperature
conversions,
sufficient
power
must
be
provided
over
the
DQ
line
when
a
temperature
conversion
is
taking place. Since the operating current of the DS18B20 is up to 1.5 mA, the DQ line will
not have sufficient drive due to the 5k pullup resistor. This problem is particularly acute if
several DS18B20s are on the same DQ and attempting to convert simultaneously.

There are two ways to assure that the DS18B20 has sufficient supply current during its
active
conversion
cycle.
The
first
is
to
provide
a
strong
pullup
on
the
DQ
line
whenever
temperature
conversions
or
copies
to
the
E2
memory
are
taking
place.
This
may
be
accomplished
by
using
a
MOSFET
to
pull
the
DQ
line
directly
to
the
power
supply
as
maximum
after
issuing
any
protocol
that
involves
copying
to
the
E2
memory
or
initiates


temperature conversions. When using the parasite power mode, the VDD pin must be tied to
ground.

Another method of supplying current to the DS18B20 is through the use of an external
power
supply
tied
to
the
VDD
pin.
The
advantage
to
this
is
that
the
strong
pullup
is
not
required on the DQ line, and the bus master need not be tied up holding that line high during
temperature

allows
other
data
traffic
on
the
1-Wire
bus
during
the
conversion time. In addition, any number of DS18B20s may be placed on the 1-Wire bus,
and
if
they
all
use
external
power,
they
may
all
simultaneously
perform
temperature
conversions by issuing the Skip ROM command and then issuing the Convert T command.
Note that as long as the external power supply is active, the GND pin may not be floating.
The core functionality of the DS18B20 is its direct- to-digital temperature sensor. The
resolution of the DS18B20 is configurable (9, 10, 11, or 12 bits), with 12-bit readings the

conversion is performed and the thermal data is stored in the scratchpad memory in a 16-bit,
sign-
extended two’s complement format. The temperature information can
be retrieved over
the 1-Wire interface by issuing a Read Scratchpad [BEh] command once the conversion has
been
performed.
The
data
is
transferred
over
the
1-Wire
bus,
LSB
first.
The
MSB
of
the
temperature register contains the “sign” (S) bit, denoting whet
her the temperature is positive
or negative.
Each DS18B20 contains a unique ROM code that is 64-bits long. The first 8 bits are a
1-Wire family code (DS18B20 code is 28h). The next 48 bits are a unique serial number.
The last 8 bits are a CRC of the first 56 bits.

The 64-bit ROM and ROM Function Control
section allow the DS18B20 to operate as a 1-Wire device and follow the 1-Wire protocol
detailed in the section “1
-
Wire Bus System.” The functions required to control sections of
the DS18B20 are not
accessible until
the ROM function protocol has been satisfied. This
protocol is described in the ROM function protocol flowchart. The 1-Wire bus master must
first
provide
one
of
five
ROM
function
commands:
1)
Read
ROM,
2)
Match
ROM,
3)
Search ROM, 4) Skip ROM, or 5) Alarm Search. After a ROM function sequence has been
successfully
executed,
the
functions
specific
to
the
DS18B20
are
accessible
and
the
bus
master may then provide one of the six memory and control function commands.
The DS18B20 has an 8-bit CRC stored in the most significant byte of the 64-bit ROM.


The
bus
master
can
compute
a
CRC
value
from
the
first
56-bits
of
the
64-bit
ROM
and
compare it to the value stored within the DS18B20 to determine if the ROM data has been
received error-free by the bus master. The equivalent polynomial function of this CRC is:
CRC = X8 + X5 + X4 + 1
The DS18B20 also generates an 8-bit CRC value using the same polynomial function
shown above and provides this value to the bus master to validate the transfer of data bytes.
In each case where a CRC is used for data transfer validation, the bus master must calculate
a CRC value using the polynomial function given above and compare the calculated value
to either the 8-bit CRC value stored in the 64-bit
ROM
portion
of
the
DS18B20
(for
ROM
reads)
or
the
8-bit
CRC
value
computed
within
the
DS18B20(which
is
read
as
a
ninth
byte
when
the
scratchpad
is
read).
The
comparison
of
CRC
values
and
decision
to
continue
with
an
operation
are
determined
entirely
by
the
bus
master.
There
is
no
circuitry
inside
the
DS18B20
that
prevents
a
command
sequence
from
proceeding
if
the
CRC
stored
in
or
calculated
by
the
DS18B20
does not match the value generated by the bus master.
The
scratchpad
is
organized
as
eight
bytes
of
memory.
The
first
2
bytes
contain
the
LSB
and
the
MSB
of
the
measured
temperature
information,
respectively.
The
third
and
fourth bytes are volatile copies of TH and TL and are refreshed with every power-on reset.
The
fifth
byte
is
a
volatile
copy
of
the
configuration
register
and
is
refreshed
with
every
power-on
reset.
The
configuration
register
will
be
explained
in
more
detail
later
in
this
section
of
the
datasheet.
The
sixth,
seventh,
and
eighth
bytes
are
used
for
internal
computations, and thus will not read out any predictable pattern.
It
is
imperative
that
one
writes
TH,
TL,
and
config
in
succession;
i.e.
a
write
is
not
valid if one writes only to TH and TL, for example, and then issues a reset. If any of these
bytes must be written, all three must be written before a reset is issued.
There is a ninth byte which may be read with a Read Scratchpad [BEh] command. This
byte contains a cyclic redundancy check (CRC) byte which is the CRC over all of the eight
previous bytes. This CRC is implemented in the fashion described in the section
titled “CRC
Generation”.